Stereo 2. General Description. APA is a monolithic integrated circuit, which. The attenuator range of the volume control in APA The advantage of internal gain setting. Both of the.

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APA Stereo 2. Low Operating Current with 9mA? High PSRR? Low Current Consumption in Shutdown Mode 1? Short Circuit Protection? Thermal shutdown protection and over current protection circuitry? Maximum Output Swing Clamping Function?

NoteBook PC? The advantage of internal gain setting can be less components and PCB area. Both of the depop circuitry and the thermal shutdown protection circuitry are integrated in APA, that reduce pops and clicks noise during power up or shutdown mode operation. It also improves the power off pop noise and protects the chip from being destroyed by over temperature and short current failure.

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Operating Characteristics, SE mode.

Setting the maximum output swing. Disable this function when tie this pin to GND. F LIN- 1? LOUT- ? BTL 1 0. Crosstalk dB Crosstalk vs. SE 1u 20 1k Frequency Hz 10k 20k Copyright? Gain dB Gain vs. Supply Voltage Output Power 2. Consequently, the differential gain for each channel is 2 x Gain of SE mode.

BTL mode operation is different from the classical single-ended SE amplifier configuration where one side of its load is connected to ground. A BTL amplifier design has a few distinct advantages over the SE configuration, as it provides differentialdrive to the load, thus doubling the output swing for aspecified supply voltage.

Four times the output power is possible as compared toa SE amplifier under the same conditions. This eliminates the need for an output coupling capacitor which is required in a single supply, SE configuration. A coupling capacitor is required to block the DC offset voltage from reaching the load. These capacitors can be quite large approximately 33? F to ? F so they tend to be expensive, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system refer to the Output Coupling Capacitor.

The rules described still hold with the addition of the following relationship: 1 Cbypass x k? This feature eliminates the requirement for an additional headphone amplifier in applications where internal stereo speakers are driven in BTL mode but external headphone or speakers must be accommodated.

I is reduced by DD approximately one-half in SE mode. Each gain step corresponds to a specific input voltage range, as shown in table. To minimize the effect of noise on the volume control pin, which can affect the selected gain level, hysteresis and clock delay are implemented. The amount of hysteresis corresponds to half of the step width, as shown in volume control graph.

When the input goes high, the OUT- amplifier is shutdown causing the speaker to mute. When O there is no headphone plugged into the system, the contact pin of the headphone jack is connnected from the signal pin, the voltage divider set up by resistors k? Resistor 1k?

The range of the steps, controlled by the DC 0. This recommended voltage is exactly halfway between the two nearest transitions. Input Resistance, Ri The gain for each audio input of the APA is set by the internal resistors Ri and Rf of volume control amplifier in inverting configuration. Input Resistance, Ri Cont. BTL mode operation brings the factor of 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load. For the varying gain setting, APA generates each input resistance on figure 4.

The input resistance will affect the low frequency performance of audio signal. The minmum input resistance is 10k? This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. Please note that it is important to confirm the capacitor polarity in the application. In this case, Ci and the minimum input impedance Ri 10k?

As other power amplifiers, proper supply bypassing is critical for low noise performance and high power supply rejection. The capacitors located on both the bypass and power supply pins should be as close to the device as possible.

The effect of a larger bypass capacitor will improve PSRR due to increased supply stability. Typical applications employ a 5V regulator with 1. F bypass capacitor as supply filtering. This does not eliminate the need for bypassing the supply nodes of the APA The selection of bypass capacitors, especially Cbypass, is thus dependent upon desired PSRR requirements, click and pop performance.

To avoid start-up pop noise occurred, the bypass voltage should rise slower than the input bias voltage and the relationship shown in equation 6 should be Copyright? Effective Bypass Capacitor, Cbypass Cont. Bypass capacitor, Cb, values of 3. F to 10? The bypass capacitance also effects to the start up time.

As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation. F capacitor with an 8? The main disadvantage, from a performance standpoint, is the load impedance is typically small, which drives the low-frequency corner higher degrading the bass response. Large values of C are required to pass low C frequencies into the load. Power supply decoupling also prevents the oscillations causing by long lead length between the amplifier and the speaker.

The optimum decoupling is achieved by using two different type capacitors that target on different type of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance ESR ceramic capacitor, typically 0. F placed as close as possible to the device VDD lead works best. For filtering lower-frequency noise signals, a large aluminum electrolytic capacitor of 10?

F or greater placed near the audio power amplifier is recommended. Optimizing Depop Circuitry Circuitry has been included in the APA to minimize the amount of popping noise at power-up and when coming out of shutdown mode. Popping occurs whenever a voltage step is applied to the speaker. In order to eliminate clicks and pops, all capacitors must be fully discharged before turn-on. The bypass voltage ramp up should be slower than input bias voltage. Although the bypass pin current source cannot be modified, the size of Cbypass can be changed to alter the device turn-on time and the amount of clicks and pops.

By increasing the value of Cbypass, turn-on pop can be reduced. However, the tradeoff for using a larger bypass capacitor is to increase the turn-on time for this device.

There is a linear relationship between the size of Cbypass and the turn-on time. In a SE configuration, the output coupling capacitor, CC, is of particular concern. This capacitor discharges through the internal 10k? Depending on the size of C , the time C Copyright? Optimizing Depop Circuitry Cont. To reduce transients in SE mode, an external 1k?

The tradeoff for using this resistor is an increase in quiescent current. In the most cases, choosing a small value of Ci in the range of 0.

F, Cb being equal to 4. F and an external 1k? A high gain amplifier intensifies the problem as the small delta in voltage is multiplied by the gain. So it is advantageous to use low-gain configurations. Shutdown Function In order to reduce power consumption while not in use, the APA contains a shutdown pin to externally turn off the amplifier bias circuitry.

The trigger point between a logic high and logic low level is typically 2. It is best to switch between ground and the supply V to DD provide maximum device performance.

Prevent unanticipated mute behavior by connecting the Mute pin to logic high or low. Do not let the Mute pin float.

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ANPEC Electronics Corporation




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